Datasheet

29.6 Functional Description
29.6.1 Principle of Operation
XOSC32K and OSCULP32K are configured via OSC32KCTRL control registers. Through this interface,
the sub-peripherals are enabled, disabled, or have their calibration values updated.
The STATUS register gathers different status signals coming from the sub-peripherals of OSC32KCTRL.
The status signals can be used to generate system interrupts, and in some cases wake up the system
from standby mode, provided the corresponding interrupt is enabled.
29.6.2 32 kHz External Crystal Oscillator (XOSC32K) Operation
The XOSC32K can operate in two different modes:
• External clock, with an external clock signal connected to XIN32
• Crystal oscillator, with an external 32.768 kHz crystal connected between XIN32 and XOUT32
At reset, the XOSC32K is disabled, and the XIN32/XOUT32 pins can either be used as General Purpose
I/O (GPIO) pins or by other peripherals in the system.
When XOSC32K is enabled, the operating mode determines the GPIO usage. When in crystal oscillator
mode, the XIN32 and XOUT32 pins are controlled by the OSC32KCTRL, and GPIO functions are
overridden on both pins. When in external clock mode, only the XIN32 pin will be overridden and
controlled by the OSC32KCTRL, while the XOUT32 pin can still be used as a GPIO pin.
Enabling,
Disabling
The XOSC32K is enabled by writing a '1' to the Enable bit in the 32 kHz External
Crystal Oscillator Control register (XOSC32K.ENABLE = 1).
The XOSC32K is disabled by writing a '0' to the Enable bit in the 32 kHz External
Crystal Oscillator Control register (XOSC32K.ENABLE = 0).
Mode Selection To enable the XOSC32K in Crystal Oscillator mode, the XTALEN bit in the 32 kHz
External Crystal Oscillator Control register must be written (XOSC32K.XTALEN = 1).
If XOSC32K.XTALEN is '0', the External Clock Input mode will be enabled.
Gain Selection When a crystal oscillator is selected, a controllable gain is provided. Writing to the
Control Gain Mode bit field (XOSC32K.CGM) will select a gain setting appropriate
for the desired trade-off between low power and high speed.
32KHz and 1KHz
Output
The XOSC32K 32.768 kHz output is enabled by setting the 32 kHz Output Enable
bit in the 32 kHz External Crystal Oscillator Control register (XOSC32K.EN32K=1).
The XOSC32K also has a 1.024 kHz clock output. This is enabled by setting the 1
kHz Output Enable bit in the 32 kHz External Crystal Oscillator Control register
(XOSC32K.EN1K = 1).
Configuration
Lock
It is also possible to lock the XOSC32K configuration by setting the Write Lock bit in
the 32 kHz External Crystal Oscillator Control register (XOSC32K.WRTLOCK=1). If
set, the XOSC32K configuration is locked until a Power-On Reset (POR) is
detected.
The XOSC32K will behave differently in different sleep modes based on the settings of
XOSC32K.RUNSTDBY, XOSC32K.ONDEMAND, and XOSC32K.ENABLE. If XOSC32KCTRL.ENABLE =
0, the XOSC32K will be always stopped. For XOS32KCTRL.ENABLE = 1, this table is valid:
SAM D5x/E5x Family Data Sheet
OSC32KCTRL – 32KHz Oscillators Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 814