Datasheet

Bit 17 – DPLL0LCKF DPLL0 Lock Fall
0: DPLL0 Lock fall edge not detected.
1: DPLL0 Lock fall edge detected.
Bit 16 – DPLL0LCKR DPLL0 Lock Rise
0: DPLL0 Lock rise edge not detected.
1: DPLL0 Lock rise edge detected.
Bit 12 – DFLLRCS DFLL Reference Clock Stopped
0: DFLL reference clock is running.
1: DFLL reference clock has stopped.
Bit 11 – DFLLLCKC DFLL Lock Coarse
0: No DFLL coarse lock detected.
1: DFLL coarse lock detected.
Bit 10 – DFLLLCKF DFLL Lock Fine
0: No DFLL fine lock detected.
1: DFLL fine lock detected.
Bit 9 – DFLLOOB DFLL Out Of Bounds
0: No DFLL Out Of Bounds detected.
1: DFLL Out Of Bounds detected.
Bit 8 – DFLLRDY DFLL Ready
0: DFLL is not ready.
1: DFLL is stable and ready to be used as a clock source.
Bit 5 – XOSCCKSW1 XOSC1 Clock Switch
0: XOSC1 is not switched and provides the external clock or crystal oscillator clock.
1: XOSC is switched and provides the safe clock.
Bit 4 – XOSCCKSW0 XOSC0 Clock Switch
0: XOSC0 is not switched and provides the external clock or crystal oscillator clock.
1: XOSC0 is switched and provides the safe clock.
Bit 3 – XOSCFAIL1 XOSC1 Clock Failure
0: XOSC1 failure not detected.
1: XOSC1 failure detected.
Bit 2 – XOSCFAIL0 XOSC0 Clock Failure
0: XOSC0 failure not detected.
1: XOSC0 failure detected.
Bit 1 – XOSCRDY1 XOSC1 Ready
0: XOSC1 is not ready.
1: XOSC1 is stable and ready to be used as a clock source.
Bit 0 – XOSCRDY0 XOSC0 Ready
0: XOSC0 is not ready.
SAM D5x/E5x Family Data Sheet
OSCCTRL – Oscillators Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 793