Datasheet

Table Of Contents
Bit 12 – TCC1 TCC1 APB Protect Enable
Value Description
0
TCC1 peripheral is not write protected
1
TCC1 peripheral is write protected
Bit 11 – TCC0 TCC0 APB Protect Enable
Value Description
0
TCC0 peripheral is not write protected
1
TCC0 peripheral is write protected
Bit 10 – SERCOM3 SERCOM3 APB Protect Enable
Value Description
0
SERCOM3 peripheral is not write protected
1
SERCOM3 peripheral is write protected
Bit 9 – SERCOM2 SERCOM2 APB Protect Enable
Value Description
0
SERCOM2 peripheral is not write protected
1
SERCOM2 peripheral is write protected
Bit 7 – EVSYS EVSYS APB Protect Enable
Value Description
0
EVSYS peripheral is not write protected
1
EVSYS peripheral is write protected
Bit 5 – DMAC DMAC APB Protect Enable
Value Description
0
DMAC peripheral is not write protected
1
DMAC peripheral is write protected
Bit 4 – PORT PORT APB Protect Enable
Value Description
0
PORT peripheral is not write protected
1
PORT peripheral is write protected
Bit 3 – CMCC CMCC APB Protect Enable
Value Description
0
CMCC peripheral is not write protected
1
CMCC peripheral is write protected
Bit 2 – NVMCTRL NVMCTRL APB Protect Enable
Value Description
0
NVMCTRL peripheral is not write protected
1
NVMCTRL peripheral is write protected
Bit 1 – DSU DSU APB Protect Enable
Value Description
0
DSU peripheral is not write protected
1
DSU peripheral is write protected
SAM D5x/E5x Family Data Sheet
PAC - Peripheral Access Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 756