Datasheet

Bit 12 – TCC1 Interrupt Flag for TCC1
This flag is set when a Peripheral Access Error occurs while accessing the TCC1, and will generate an
interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the TCC1 interrupt flag.
Bit 11 – TCC0 Interrupt Flag for TCC0
This flag is set when a Peripheral Access Error occurs while accessing the TCC0, and will generate an
interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the TCC0 interrupt flag.
Bit 10 – SERCOM3 Interrupt Flag for SERCOM3
This flag is set when a Peripheral Access Error occurs while accessing the SERCOM3, and will generate
an interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the SERCOM3 interrupt flag.
Bit 9 – SERCOM2 Interrupt Flag for SERCOM2
This flag is set when a Peripheral Access Error occurs while accessing the SERCOM2, and will generate
an interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the SERCOM2 interrupt flag.
Bit 7 – EVSYS Interrupt Flag for EVSYS
This flag is set when a Peripheral Access Error occurs while accessing the EVSYS, and will generate an
interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the EVSYS interrupt flag.
Bit 5 – DMAC Interrupt Flag for DMAC
This flag is set when a Peripheral Access Error occurs while accessing the DMAC, and will generate an
interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the DMAC interrupt flag.
Bit 4 – PORT Interrupt Flag for PORT
This flag is set when a Peripheral Access Error occurs while accessing the PORT, and will generate an
interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the PORT interrupt flag.
Bit 3 – CMCC Interrupt Flag for CMCC
This flag is set when a Peripheral Access Error occurs while accessing the CMCC, and will generate an
interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the CMCC interrupt flag.
SAM D5x/E5x Family Data Sheet
PAC - Peripheral Access Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 744