Datasheet

Bit 4 – OSCCTRL Interrupt Flag for OSCCTRL
This bit is set when a Peripheral Access Error occurs while accessing the OSCCTRL, and will generate
an interrupt request if SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the flag.
Bit 3 – RSTC Interrupt Flag for RSTC
This bit is set when a Peripheral Access Error occurs while accessing the RSTC, and will generate an
interrupt request if SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the flag.
Bit 2 – MCLK Interrupt Flag for MCLK
This bit is set when a Peripheral Access Error occurs while accessing the MCLK, and will generate an
interrupt request if SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the flag.
Bit 1 – PM Interrupt Flag for PM
This bit is set when a Peripheral Access Error occurs while accessing the PM, and will generate an
interrupt request if SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the flag.
Bit 0 – PAC Interrupt Flag for PAC
This bit is set when a Peripheral Access Error occurs while accessing the PAC, and will generate an
interrupt request if SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the flag.
SAM D5x/E5x Family Data Sheet
PAC - Peripheral Access Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 742