Datasheet

Bit 11 – PUKCC Interrupt Flag for PUKCC
This flag is set when an access error is detected by the PUKCC AHB slave, and will generate an interrupt
request if INTENCLR/SET.ERR is '1'.
Writing a '0' has no effect.
Writing a '1' to this bit will clear the PUKCC interrupt flag.
Bit 10 – HPB3 Interrupt Flag for HPB3
This flag is set when an access error is detected by the HPB3 AHB slave, and will generate an interrupt
request if INTENCLR/SET.ERR is '1'.
Writing a '0' has no effect.
Writing a '1' to this bit will clear the HPB3 interrupt flag.
Bit 9 – HPB2 Interrupt Flag for HPB2
This flag is set when an access error is detected by the HPB2 AHB slave, and will generate an interrupt
request if INTENCLR/SET.ERR is '1'.
Writing a '0' has no effect.
Writing a '1' to this bit will clear the HPB2 interrupt flag.
Bit 8 – HPB1 Interrupt Flag for HPB1
This flag is set when an access error is detected by the HPB1 AHB slave, and will generate an interrupt
request if INTENCLR/SET.ERR is '1'.
Writing a '0' has no effect.
Writing a '1' to this bit will clear the HPB1 interrupt flag.
Bit 7 – HPB0 Interrupt Flag for HPB0
This flag is set when an access error is detected by the HPB0 AHB slave, and will generate an interrupt
request if INTENCLR/SET.ERR is '1'.
Writing a '0' has no effect.
Writing a '1' to this bit will clear the HPB0 interrupt flag.
Bit 6 – RAMDMACICM Interrupt Flag for RAMDMACICM
This flag is set when an access error is detected by the RAMDMACICM AHB slave, and will generate an
interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' has no effect.
Writing a '1' to this bit will clear the RAMDMACICM interrupt flag.
Bit 5 – RAMDMAWR Interrupt Flag for RAMDMAWR
This flag is set when an access error is detected by the RAMDMAWR AHB slave, and will generate an
interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' has no effect.
Writing a '1' to this bit will clear the RAMDMAWR interrupt flag.
Bit 4 – RAMPPPDSU Interrupt Flag for RAMPPPDSU:
This flag is set when an access error is detected by the RAMPPPDSU AHB slave, and will generate an
interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' has no effect.
Writing a '1' to this bit will clear the RAMPPPDSU interrupt flag.
SAM D5x/E5x Family Data Sheet
PAC - Peripheral Access Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 738