Datasheet

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Transfer Type Main
List
RCFG RNEXT Comments
CDWBN WRAP EOM NEXT
Multiple
Regions
Contiguous list
of blocks
Digest written to
memory
Monitoring
disabled
More
than
one
item
0 0 1 for the
last, 0
otherwise
0 ICM passes
through the list
once.
Contiguous list
of blocks
Digest
comparison is
enabled
Monitoring is
enabled
More
than
one
item
1 1 for the
last, 0
otherwise
0 0 ICM performs
active monitoring
of the regions. If a
mismatch occurs,
an interrupt is
raised.
Non-contiguous
list of blocks
Digest is written
to memory
Monitoring is
disabled
More
than
one
item
0 0 1 Secondary
List address
ICM performs
hashing and
saves digests to
the Hash area.
Non-contiguous
list of blocks
Digest
comparison is
enabled
Monitoring is
enabled
More
than
one
item
1 1 0 Secondary
List address
ICM performs
data gathering on
a per region
basis.
26.6.7 Security Features
When an undefined register access occurs, the URAD bit in the Interrupt Status Register (ISR) is set if
unmasked. Its source is then reported in the Undefined Access Status Register (UASR). Only the first
undefined register access is available through the UASR.URAT field.
Several kinds of unspecified register accesses can occur:
• Unspecified structure member set to one detected when the descriptor is loaded
• Configuration register (CFG) modified during active monitoring
• Descriptor register (DSCR) modified during active monitoring
• Hash register (HASH) modified during active monitoring
• Write-only register read access
The URAD bit and the URAT field can only be reset by writing a 1 to the CTRL.SWRST bit.
SAM D5x/E5x Family Data Sheet
ICM - Integrity Check Monitor
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 702