Datasheet

Table Of Contents
26.6.3.1.2 Region Configuration Structure Member
Name:  RCFG
Offset:  0x04 + n*0x0C [n=0..3]
Reset:  0x00000000
Property:  Read/Write
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
ALGO[2:0] PROCDLY SUIEN ECIEN
Access
R/W R/W R/W
Reset 0 0 0 0 1 1
Bit 7 6 5 4 3 2 1 0
WCIEN BEIEN DMIEN RHIEN EOM WRAP CDWBN
Access
R/W R/W R/W R/W R/W R/W R/W
Reset 1 1 1 1 0 0 0
Bits 14:12 – ALGO[2:0] User SHA Algorithm
Value Name Description
0
SHA1 SHA1 algorithm processed
1
SHA256 SHA256 algorithm processed
4
SHA224 SHA224 algorithm processed
Other
- Reserved
Bit 10 – PROCDLY Processing Delay
For a given SHA algorithm, the runtime period has two possible lengths:
Table 26-2. SHA Processing Runtime Periods
Algorithm SHORTEST [number of cycles] LONGEST [number of cycles]
SHA1 85 209
SHA224 72 194
SHA256 72 194
Value Name Description
0
SHORTEST SHA processing runtime is the shortest one
1
LONGEST SHA processing runtime is the longest one
SAM D5x/E5x Family Data Sheet
ICM - Integrity Check Monitor
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 696