Datasheet

25.8.2 Control B
Name: CTRLB
Offset: 0x04
Reset: 0x0000
Property: PAC Write-Protection
Bit 15 14 13 12 11 10 9 8
CMDEX[7:0]
Access
PAC Write-
Protection
PAC Write-
Protection
PAC Write-
Protection
PAC Write-
Protection
PAC Write-
Protection
PAC Write-
Protection
PAC Write-
Protection
PAC Write-
Protection
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
CMD[6:0]
Access
W W W W W W W
Reset 0 0 0 0 0 0 0
Bits 15:8 – CMDEX[7:0] Command Execution
This bit group should be written with the key value 0xA5 to enable the command written to CMD to be
executed. If the bit group is written with a different key value, the write is not performed and
INTFLAG.PROGE is set. PROGE is also set if the a previously written command is not complete.
The key value must be written at the same time as CMD. If a command is issued through the APB bus on
the same cycle as an AHB bus access, the AHB bus access will be given priority. The command will then
be executed when the NVM block and the AHB bus are idle.
STATUS.READY must be one when the command is issued.
INTFLAG.DONE is set when the command completes.
Value Name Description
0xA5
KEY Execution Key
Other
- Reserved
Bits 6:0 – CMD[6:0] Command
These bits define the command to be executed when the CMDEX key is written.
Value Name Description
0x0
EP Erase Page - Only supported in the User page in the auxiliary space.
0x1
EB Erase Block - Erases the block addressed by the ADDR register, not supported
in the user page
0x2
Reserved
0x3
WP Write Page - Writes the contents of the page buffer to the page addressed by
the ADDR register, not supported in the user page
0x4
WQW Write Quad Word - Writes a 128-bit word at the location addressed by the
ADDR register.
0x5-0xF
Reserved
0x10
SWRST Software Reset - Power-Cycle the NVM memory and replay the device
automatic calibration procedure and resets the module configuration registers
0x11
LR Lock Region - Locks the region containing the address location in the ADDR
register until next reset.
SAM D5x/E5x Family Data Sheet
NVMCTRL – Nonvolatile Memory Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 666