Datasheet

– PBLDATA[63:0] = 0x00000003_0xFFFFFFFF
BANKA and BANKB share the same page buffer. Writing to the NVM block via the AHB bus is buffered in
the page buffer. For each AHB bus write, the address is stored in the ADDR register. After the page buffer
has been loaded with the required number of bytes, the page can be written to the addressed location by
setting CMD to Write Page to write the NVM main array and setting the key value to CMDEX. The LOAD
bit in the STATUS register indicates whether the page buffer has been loaded or not. Before writing the
page to memory, the accessed block must be erased.
Several write modes are supported and configured through CTRLA.WMODE.
• Manual (MAN):
This is the default configuration. Because the address is automatically stored in ADDR during AHB write
operations, the last given address will be present in the ADDR register. There is no need to load the
ADDR register manually, unless a different page in memory is to be written. A write should be issued
before writing to a different page.
• Automatic Write With Double Word Granularity (ADW):
Automatically writes data with double-word granularity. In this case the WQW command is triggered at the
quad-word addressed by ADDR when the last word in a double-word aligned block is written. The other
double-word inside the page buffer must be all one. STATUS.READY goes low during the NVM write
operation. INTFLAG.DONE flag is set upon completion.
• Automatic Write With Quad Word Granularity (AQW):
Automatically writes data with quad-word granularity. In this case the WQW command is triggered at the
quad-word addressed by ADDR when the last word in a quad-word aligned block is written.
STATUS.READY goes low during the NVM write operation. INTFLAG.DONE flag is set upon completion.
• Automatic Write With Page Granularity (AP)
Automatically writes data with page granularity. In this case the WP command is triggered at the page
addressed by ADDR when the last word in a page aligned block is written. STATUS.READY goes low
during the NVM write operation. INTFLAG.DONE flag is set upon completion.
These write modes are supported for writes in the main address space and in the USER page. The
USER page doesn’t support write page, if the AP mode is selected writes in the USER page will be done
in AQW mode. This avoids to change WMODE by software while mixing writes in the main address space
and in the USER page.
Procedure for Manual Page Writes (WMODE=MAN)
The block to be written must be erased before the write command is given.
• Write to the page buffer by addressing the NVM main address space directly
• Write the page buffer to memory:
– CMD=WP (and CMDEX) to write the full content of the page buffer into the NVM at the page
pointed by ADDR
– CMD=WQW (and CMDEX) to write into the NVM the page buffer quad word pointed by ADDR
• The READY bit in the STATUS register will be low while programming is in progress, and access
through the AHB in the same bank will be stalled.
Procedure for Automatic Writes (WMODE=ADW or AQW or APW)
SAM D5x/E5x Family Data Sheet
NVMCTRL – Nonvolatile Memory Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 648