Datasheet

Table Of Contents

25. NVMCTRL – Nonvolatile Memory Controller

25.1 Overview

Non-volatile memory (NVM) is a reprogrammable flash memory that retains program and data storage,

even when powered off. The NVM Controller (NVMCTRL) embeds two banks; one bank can be read

while the other is programmed (RWW). It is connected to the AHB and APB bus interfaces for system

access to the NVM block. The AHB interfaces are used for reads and writes to the NVM block, while the

APB interface is used for commands and configuration.

25.2 Features

• Two 32-bit AHB interfaces for reads and writes in the NVM main address space

• SmartEEPROM (integrated EEPROM emulation algorithm)

• Read while write (Any bank can be read while programming the other one)

• All NVM sections are memory mapped to the AHB, including calibration and system configuration

• 32-bit APB interface for commands and control

• Programmable wait states for read optimization

• 32 regions can be individually protected or unprotected

• Additional protection for boot loader

• Supports device protection through a security bit

• Interface to Power Manager to power-down flash blocks while in sleep modes

• Can optionally wake up on exit from sleep or on first access

• Single line cache per AHB interface

• Dual bank for safer application upgrade

• Error Correction Code (ECC)

SAM D5x/E5x Family Data Sheet

NVMCTRL – Nonvolatile Memory Controller

Datasheet

DS60001507E-page 639