Datasheet

24.9.88 GMAC 1588 Timer Adjust Register
Name: TA
Offset: 0x1D8
Reset: 0x00000000
Property: Write-Only
Bit 31 30 29 28 27 26 25 24
ADJ ITDT[29:24]
Access
W W W W W W W
Reset 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
ITDT[23:16]
Access
W W W W W W W W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
ITDT[15:8]
Access
W W W W W W W W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
ITDT[7:0]
Access
W W W W W W W W
Reset 0 0 0 0 0 0 0 0
Bit 31 – ADJ Adjust 1588 Timer
Write as '1' to subtract from the 1588 timer. Write as '0' to add to it.
Bits 29:0 – ITDT[29:0] Increment/Decrement
The number of nanoseconds to increment or decrement the IEEE 1588 Timer Nanoseconds Register. If
necessary, the IEEE 1588 Seconds Register will be incremented or decremented.
SAM D5x/E5x Family Data Sheet
GMAC - Ethernet MAC
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 625