Datasheet

Table Of Contents

24.9.73 GMAC Frame Check Sequence Errors Register

Name: FCSE

Offset: 0x190

Reset: 0x00000000

Property: Read-only

Bit 31 30 29 28 27 26 25 24

Access

Reset

Bit 23 22 21 20 19 18 17 16

Access

Reset

Bit 15 14 13 12 11 10 9 8

FCKR[9:8]

Access

R R

Reset 0 0

Bit 7 6 5 4 3 2 1 0

FCKR[7:0]

Access

R R R R R R R R

Reset 0 0 0 0 0 0 0 0

Bits 9:0 – FCKR[9:0] Frame Check Sequence Errors

The register counts frames that are an integral number of bytes, have bad CRC and are between 64 and

1518 bytes in length (1536 Bytes if NCFGR.MAXFS is written to '1'). This register is also incremented if a

symbol error is detected and the frame is of valid length and has an integral number of bytes.

This register is incremented for a frame with bad FCS, regardless of whether it is copied to memory due

to ignore FCS mode (enabled by writing NCFGR.IRXFCS=1).

SAM D5x/E5x Family Data Sheet

GMAC - Ethernet MAC

Datasheet

DS60001507E-page 610