Datasheet

24.9.56 GMAC Carrier Sense Errors Register
Name: CSE
Offset: 0x14C
Reset: 0x00000000
Property: Read-only
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
CSR[9:8]
Access
R R
Reset 0 0
Bit 7 6 5 4 3 2 1 0
CSR[7:0]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bits 9:0 – CSR[9:0] Carrier Sense Error
This register counts the number of frames transmitted with carrier sense was not seen during
transmission or where carrier sense was de-asserted after being asserted in a transmit frame without
collision (no underrun). Only incremented in half duplex mode. The only effect of a carrier sense error is
to increment this register. The behavior of the other statistics registers is unaffected by the detection of a
carrier sense error.
SAM D5x/E5x Family Data Sheet
GMAC - Ethernet MAC
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 593