Datasheet

24.9.27 GMAC Stacked VLAN Register
Name: SVLAN
Offset: 0x0C0
Reset: 0x00000000
Property: -
Bit 31 30 29 28 27 26 25 24
ESVLAN
Access
Reset 0
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
VLAN_TYPE[15:8]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
VLAN_TYPE[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 31 – ESVLAN Enable Stacked VLAN Processing Mode
0: Disable the stacked VLAN processing mode
1: Enable the stacked VLAN processing mode
Value Description
0
Stacked VLAN Processing disabled
1
Stacked VLAN Processing enabled
Bits 15:0 – VLAN_TYPE[15:0] User Defined VLAN_TYPE Field
When Stacked VLAN is enabled (ESVLAN=1), the first VLAN tag in a received frame will only be
accepted if the VLAN type field is equal to this user defined VLAN_TYPE, OR equal to the standard
VLAN type (0x8100).
Note: The second VLAN tag of a Stacked VLAN packet will only be matched correctly if its VLAN_TYPE
field equals 0x8100.
SAM D5x/E5x Family Data Sheet
GMAC - Ethernet MAC
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 564