Datasheet

24.9.20 GMAC Hash Register Bottom
Name: HRB
Offset: 0x080
Reset: 0x00000000
Property: Read/Write
The unicast hash enable (UNIHEN) and the multicast hash enable (MITIHEN) bits in the Network
Configuration Register (NCFGR) enable the reception of hash matched frames.
Bit 31 30 29 28 27 26 25 24
ADDR[31:24]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
ADDR[23:16]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
ADDR[15:8]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
ADDR[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 31:0 – ADDR[31:0] Hash Address
The first 32 bits of the Hash Address Register.
SAM D5x/E5x Family Data Sheet
GMAC - Ethernet MAC
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 556