Datasheet

Table Of Contents
Bit 6 – TFC Transmit Frame Corruption Due to AHB Error
Transmit frame corruption due to AHB error. Set if an error occurs during reading a transmit frame from
the AHB, including HRESP errors and buffers exhausted mid frame.
Bit 5 – RLEX  Retry Limit Exceeded
Retry Limit Exceeded Transmit error.
Cleared on read.
Bit 4 – TUR Transmit Underrun
This interrupt is set if the transmitter was forced to terminate an ongoing frame transmission due to further
data being unavailable.
This interrupt is also set if a transmitter status write back has not completed when another status write
back is attempted.
This interrupt is also set when the transmit DMA has written the SOP data into the FIFO and either the
AHB bus was not granted in time for further data, or because an AHB not OK response was returned, or
because the used bit was read.
Bit 3 – TXUBR TX Used Bit Read
Set when a transmit buffer descriptor is read with its used bit set.
Cleared on read.
Bit 2 – RXUBR RX Used Bit Read
Set when a receive buffer descriptor is read with its used bit set.
Cleared on read.
Bit 1 – RCOMP Receive Complete
A frame has been stored in memory.
Cleared on read.
Bit 0 – MFS Management Frame Sent
The PHY Maintenance Register has completed its operation.
Cleared on read.
SAM D5x/E5x Family Data Sheet
GMAC - Ethernet MAC
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 541