Datasheet

Value Description
0x00
Reserved
0x01-0x
FF
1..255 x 64 byte buffer
Bit 11 – TXCOEN Transmitter Checksum Generation Offload Enable
Transmitter IP, TCP and UDP checksum generation offload enable.
Value Description
0
Frame data is unaffected.
1
The transmitter checksum generation engine calculates and substitutes checksums for
transmit frames.
Bit 10 – TXPBMS Transmitter Packet Buffer Memory Size Select
When written to zero, the amount of memory used for the transmit packet buffer is reduced by 50%. This
reduces the amount of memory used by the GMAC.
It is important to write this bit to '1' if the full configured physical memory is available. The value in
parentheses represents the size that would result for the default maximum configured memory size of
4KBytes.
Value Description
0
Top address bits not used. (2KByte used.)
1
Full configured addressable space (4KBytes) used.
Bits 9:8 – RXBMS[1:0] Receiver Packet Buffer Memory Size Select
The default receive packet buffer size is FULL=RECEIVE_BUFFER_SIZE Kbytes. The table below shows
how to configure this memory to FULL, HALF, QUARTER or EIGHTH of the default size.
Value Name Description
0
EIGHTH RECEIVE_BUFFER_SIZE/8 Kbyte Memory Size
1
QUARTER RECEIVE_BUFFER_SIZE/4 Kbytes Memory Size
2
HALF RECEIVE_BUFFER_SIZE/2 Kbytes Memory Size
3
FULL RECEIVE_BUFFER_SIZE Kbytes Memory Size
Bit 7 – ESPA Endian Swap Mode Enable for Packet Data Accesses
Value Description
0
Little endian mode for AHB transfers selected.
1
Big endian mode for AHB transfers selected.
Bit 6 – ESMA Endian Swap Mode Enable for Management Descriptor Accesses
Value Description
0
Little endian mode for AHB transfers selected.
1
Big endian mode for AHB transfers selected.
Bits 4:0 – FBLDO[4:0] Fixed Burst Length for DMA Data Operations
Selects the burst length to attempt to use on the AHB when transferring frame data. Not used for DMA
management operations and only used where space and data size allow. Otherwise SINGLE type AHB
transfers are used.
One-hot priority encoding enforced automatically on register writes as follows. ‘x’ represents don’t care.
Value Name Description
0
- Reserved
1
SINGLE 00001: Always use SINGLE AHB bursts
SAM D5x/E5x Family Data Sheet
GMAC - Ethernet MAC
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 532