Datasheet

24.6.20 10/100 Operation
The 10/100 Mbps speed bit in the Network Configuration register is used to select between 10 Mbps and
100 Mbps.
24.6.21 Jumbo Frames
The jumbo frames enable bit in the Network Configuration register allows the GMAC, in its default
configuration, to receive jumbo frames up to 10240 bytes in size. This operation does not form part of the
IEEE 802.3 specification and is normally disabled. When jumbo frames are enabled, frames received with
a frame size greater than 10240 bytes are discarded.
24.7 Programming Interface
24.7.1 Initialization
24.7.1.1 Configuration
Initialization of the GMAC configuration (e.g., loop back mode, frequency ratios) must be done while the
transmit and receive circuits are disabled. See the description of the Network Control register and
Network Configuration register earlier in this document.
To change loop back mode, the following sequence of operations must be followed:
1. Write to Network Control register to disable transmit and receive circuits.
2. Write to Network Control register to change loop back mode.
3. Write to Network Control register to re-enable transmit or receive circuits.
Note: These writes to the Network Control register cannot be combined in any way.
24.7.1.2 Receive Buffer List
Receive data is written to areas of data (i.e., buffers) in system memory. These buffers are listed in
another data structure that also resides in main memory. This data structure (receive buffer queue) is a
sequence of descriptor entries as defined in Table 1-6 “Receive Buffer Descriptor Entry”.
The Receive Buffer Queue Pointer register points to this data structure.
Figure 24-3. Receive Buffer List
Receive Buffer Queue Pointer
(MAC Register)
Receive Buffer 0
Receive Buffer 1
Receive Buffer N
Receive Buffer Descriptor List
(In memory)
(In memory)
To create the list of buffers:
1. Allocate a number (N) of buffers of X bytes in system memory, where X is the DMA buffer length
programmed in the DMA Configuration register.
2. Allocate an area 8N bytes for the receive buffer descriptor list in system memory and create N
entries in this list. Mark all entries in this list as owned by GMAC, i.e., bit 0 of word 0 set to 0.
SAM D5x/E5x Family Data Sheet
GMAC - Ethernet MAC
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 507