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If the hash index points to a bit that is set in the Hash register then the frame will be matched according to
whether the frame is multicast or unicast.
A multicast match will be signaled if the multicast hash enable bit is set, da[0] is logic 1 and the hash
index points to a bit set in the Hash register.
A unicast match will be signaled if the unicast hash enable bit is set, da[0] is logic 0 and the hash index
points to a bit set in the Hash register.
To receive all multicast frames, the Hash register should be set with all ones and the multicast hash
enable bit should be set in the Network Configuration register.
24.6.10 Copy all Frames (Promiscuous Mode)
If the Copy All Frames bit is set in the Network Configuration register then all frames (except those that
are too long, too short, have FCS errors or have GRXER asserted during reception) will be copied to
memory. Frames with FCS errors will be copied if bit 26 is set in the Network Configuration register.
24.6.11 Disable Copy of Pause Frames
Pause frames can be prevented from being written to memory by setting the disable copying of pause
frames control bit 23 in the Network Configuration register. When set, pause frames are not copied to
memory regardless of the Copy All Frames bit, whether a hash match is found, a type ID match is
identified or if a destination address match is found.
24.6.12 VLAN Support
The following table describes an Ethernet encoded 802.1Q VLAN tag.
Table 24-4. 802.1Q VLAN Tag
TPID (Tag Protocol Identifier) 16 bits TCI (Tag Control Information) 16 bits
0x8100 First 3 bits priority, then CFI bit, last 12 bits VID
The VLAN tag is inserted at the 13th byte of the frame adding an extra four bytes to the frame. To support
these extra four bytes, the GMAC can accept frame lengths up to 1536 bytes by setting bit 8 in the
Network Configuration register.
If the VID (VLAN identifier) is null (0x000) this indicates a priority-tagged frame.
The following bits in the receive buffer descriptor status word give information about VLAN tagged
frames:-
Bit 21 set if receive frame is VLAN tagged (i.e., type ID of 0x8100).
Bit 20 set if receive frame is priority tagged (i.e., type ID of 0x8100 and null VID). (If bit 20 is set, bit
21 will be set also.)
Bit 19, 18 and 17 set to priority if bit 21 is set.
Bit 16 set to CFI if bit 21 is set.
The GMAC can be configured to reject all frames except VLAN tagged frames by setting the discard non-
VLAN frames bit in the Network Configuration register.
24.6.13 Wake on LAN Support
The receive block supports Wake on LAN by detecting the following events on incoming receive frames:
Magic packet
Address Resolution Protocol (ARP) request to the device IP address
SAM D5x/E5x Family Data Sheet
GMAC - Ethernet MAC
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 496