Datasheet

...........continued
Offset Name Bit Pos.
0x2C PENDCH
7:0 PENDCH7 PENDCH6 PENDCH5 PENDCH4 PENDCH3 PENDCH2 PENDCH1 PENDCH0
15:8 PENDCH15 PENDCH14 PENDCH13 PENDCH12 PENDCH11 PENDCH10 PENDCH9 PENDCH8
23:16 PENDCH23 PENDCH22 PENDCH21 PENDCH20 PENDCH19 PENDCH18 PENDCH17 PENDCH16
31:24 PENDCH31 PENDCH30 PENDCH29 PENDCH28 PENDCH27 PENDCH26 PENDCH25 PENDCH24
0x30 ACTIVE
7:0 LVLEX3 LVLEX2 LVLEX1 LVLEX0
15:8 ABUSY ID[4:0]
23:16 BTCNT[7:0]
31:24 BTCNT[15:8]
0x34 BASEADDR
7:0 BASEADDR[7:0]
15:8 BASEADDR[15:8]
23:16 BASEADDR[23:16]
31:24 BASEADDR[31:24]
0x38 WRBADDR
7:0 WRBADDR[7:0]
15:8 WRBADDR[15:8]
23:16 WRBADDR[23:16]
31:24 WRBADDR[31:24]
0x3C
...
0x3F
Reserved
0x40 CHCTRLA0
7:0 RUNSTDBY ENABLE SWRST
15:8 TRIGSRC[7:0]
23:16 TRIGACT[1:0]
31:24 THRESHOLD[1:0] BURSTLEN[3:0]
0x44 CHCTRLB0 7:0 CMD[1:0]
0x45 CHPRILVL0 7:0 PRILVL[1:0]
0x46 CHEVCTRL0 7:0 EVOE EVIE EVOMODE[1:0] EVACT[2:0]
0x47
...
0x4B
Reserved
0x4C CHINTENCLR0 7:0 SUSP TCMPL TERR
0x4D CHINTENSET0 7:0 SUSP TCMPL TERR
0x4E CHINTFLAG0 7:0 SUSP TCMPL TERR
0x4F CHSTATUS0 7:0 CRCERR FERR BUSY PEND
0x50 CHCTRLA1
7:0 RUNSTDBY ENABLE SWRST
15:8 TRIGSRC[7:0]
23:16 TRIGACT[1:0]
31:24 THRESHOLD[1:0] BURSTLEN[3:0]
0x54 CHCTRLB1 7:0 CMD[1:0]
0x55 CHPRILVL1 7:0 PRILVL[1:0]
0x56 CHEVCTRL1 7:0 EVOE EVIE EVOMODE[1:0] EVACT[2:0]
0x57
...
0x5B
Reserved
0x5C CHINTENCLR1 7:0 SUSP TCMPL TERR
0x5D CHINTENSET1 7:0 SUSP TCMPL TERR
SAM D5x/E5x Family Data Sheet
DMAC – Direct Memory Access Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 403