Datasheet

The event is acknowledged as soon as the event is received. When received, both the Channel Pending
status bit in the Channel Status register (CHSTATUS.PEND) and the corresponding Channel n bit in the
Pending Channels register (PENDCH.PENDCHn) are set. If the event is received while the channel is
pending, the event trigger is lost.
The figure below shows an example where beat transfers are enabled by internal events.
Figure 22-12. Burst Event Trigger Action
BURST BURST BURST
Block Transfer
BURST BURST BURST
Block Transfer
Event
BUSYCHn
Data Transfer
PENDCHn
Trigger Lost
Peripheral Trigger
Conditional Transfer on Strobe
The event input is used to trigger a transfer on peripherals with pending transfer requests. This event
action is intended to be used with peripheral triggers, e.g., for timed communication protocols or periodic
transfers between peripherals: only when the peripheral trigger coincides with the occurrence of a
(possibly cyclic) event the transfer is issued.
The event is acknowledged as soon as the event is received. The peripheral trigger request is stored
internally when the previous trigger action is completed (i.e., the channel is not pending) and when an
active event is received. If the peripheral trigger is active, the DMA will wait for an event before the
peripheral trigger is internally registered. When both event and peripheral transfer trigger are active, both
CHSTATUS.PEND and PENDCH.PENDCHn are set. A software trigger will now trigger a transfer.
The figure below shows an example where the peripheral beat transfer is started by a conditional strobe
event action.
Figure 22-13. Periodic Event with Burst Peripheral Triggers
Trigger LostTrigger Lost
BURST
Peripheral Trigger
PENDCHn
Event
Block Transfer
Data Transfer
SAM D5x/E5x Family Data Sheet
DMAC – Direct Memory Access Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 391