Datasheet

Table 6-8. SERCOM I²C Pinout
Package Pin Count Supply I/O pins with I²C Support
128 VDDIOB PA08, PA09
VDDIO PA12, PA13, PA16, PA17, PA22,
PA23, PD08, PD09
120 VDDIOB PA08, PA09
VDDIO PA12, PA13, PA16, PA17, PA22,
PA23, PD08, PD09
100 VDDIOB PA08, PA09
VDDIO PA12, PA13, PA16, PA17, PA22,
PA23
64 VDDIOB PA08, PA09
VDDIO PA12, PA13, PA16, PA17, PA22,
PA23
48 VDDIO PA08, PA09, PA12, PA13, PA16,
PA17, PA22, PA23
6.2.7 TCC Configurations
The SAM D5x/E5x has five instances of the Timer/Counter for Control applications (TCC) peripheral,
TCC[4:0]. The following table lists the features for each TCC instance.
Table 6-9. TCC Configuration Summary
TCC#
Channels
(CC_NUM)
Waveform
Output
(WO_NUM)
Counter
size
Fault Dithering Output
matrix
Dead Time
Insertion
(DTI)
SWAP Pattern
generation
0 6 8 24-bit Yes Yes Yes Yes Yes Yes
1 4 8 24-bit Yes Yes Yes Yes Yes Yes
2 3 3 16-bit Yes - Yes - - -
3 2 2 16-bit Yes - - - - -
4 2 2 16-bit Yes - - - - -
Note: The number of CC registers (CC_NUM) for each TCC corresponds to the number of compare/
capture channels, so that a TCC can have more Waveform Outputs (WO_NUM) than CC registers.
6.2.8 IOSET Configurations
The SAM D5x/E5x has multiple peripheral instances, mapped to different IO locations. Each peripheral IO
location is called IOSET and for a given peripheral, signals from different IOSET cannot be mixed.
For a given peripheral with two pads PAD0 and PAD1:
• Valid: PAD0 and PAD1 in the same IOSETn.
• Invalid: PAD0 in IOSETx and PAD1 in IOSETy.
SAM D5x/E5x Family Data Sheet
I/O Multiplexing and Considerations
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 39