Datasheet

21.12.14 Tamper Control
Name: TAMPCTRL
Offset: 0x60
Reset: 0x00000000
Property: PAC Write-Protection, Enable-Protected
Bit 31 30 29 28 27 26 25 24
DEBNC4 DEBNC3 DEBNC2 DEBNC1 DEBNC0
Access
Reset 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
TAMLVL4 TAMLVL3 TAMLVL2 TAMLVL1 TAMLVL0
Access
Reset 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
IN4ACT[1:0]
Access
Reset 0 0
Bit 7 6 5 4 3 2 1 0
IN3ACT[1:0] IN2ACT[1:0] IN1ACT[1:0] IN0ACT[1:0]
Access
Reset 0 0 0 0 0 0 0 0
Bits 24, 25, 26, 27, 28 – DEBNC Debounce Enable of Tamper Input INn
Note: Debounce feature does not apply to the Active Layer Protection mode (TAMPCTRL.INACT =
ACTL).
Value Description
0
Debouncing is disabled for Tamper input INn
1
Debouncing is enabled for Tamper input INn
Bits 16, 17, 18, 19, 20 – TAMLVL Tamper Level Select of Tamper Input INn
Note: Tamper Level feature does not apply to the Active Layer Protection mode (TAMPCTRL.INACT =
ACTL).
Value Description
0
A falling edge condition will be detected on Tamper input INn.
1
A rising edge condition will be detected on Tamper input INn.
Bits 0:1, 2:3, 4:5, 6:7, 8:9 – INACT Tamper Channel n Action
These bits determine the action taken by Tamper Channel n.
Value Name Description
0x0
OFF Off (Disabled)
0x1
WAKE Wake and set Tamper flag
0x2
CAPTURE Capture timestamp and set Tamper flag
SAM D5x/E5x Family Data Sheet
RTC – Real-Time Counter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 369