Datasheet

...........continued
VQFN 48
TQFP/VQFN/WLCSP 64
TQFP 100
TFBGA
120
TQFP 128
Pad
Name
A B C D E F G H I J K L M N
EIC ANARE
F
ADC0 ADC1 AC DAC PTC SERCO
M
SERCO
M
TC TCC TCC,
PDEC
QSPI,
CAN1,
USB,
CORTE
X_CM4
SDHC,
CAN0
I
2
S PCC GMAC GCLK,
AC
CCL
46 58/D5 94 B6 120 PA31 EIC/
EXTIN
T[15]
- - - - - - SERCO
M1/
PAD[3]
TC6/
WO[1]
TCC2/
WO[1]
- CORTE
X_CM4/
SWDIO-
- - - - - CCL/
OUT[1]
59/A6 95 A5 121 PB30 EIC/
EXTIN
T[14]
- - - - - - SERCO
M5/
PAD[1]
TC0/
WO[0]
TCC4/
WO[0]
TCC0/
WO[6]
CORTE
X_CM4/
SWO
- - - - - -
60/B6 96 B5 122 PB31 EIC/
EXTIN
T[15]
- - - - - - SERCO
M5/
PAD[0]
TC0/
WO[1]
TCC4/
WO[1]
TCC0/
WO[7]
- - - - - -
- A4 123 PC30 EIC/
EXTIN
T[14]
- - ADC1/
AIN[12]
- - - - - - - - - - - - - -
- B4 124 PC31 EIC/
EXTIN
T[15]
- - ADC1/
AIN[13]
- - - - - - - - - - - - - -
61/A7 97 A3 125 PB00 EIC/
EXTIN
T[0]
- ADC0/
AIN[12]
- - - X30/Y3
0
- SERCO
M5/
PAD[2]
TC7/
WO[0]
- - - - - - - - CCL/
IN[1]
62/B7 98 B3 126 PB01 EIC/
EXTIN
T[1]
- ADC0/
AIN[13]
- - - X31/Y3
1
- SERCO
M5/
PAD[3]
TC7/
WO[1]
- - - - - - - - CCL/
IN[2]
47 63/A8 99 A2 127 PB02 EIC/
EXTIN
T[2]
- ADC0/
AIN[14]
- - - X20/Y2
0
- SERCO
M5/
PAD[0]
TC6/
WO[0]
TCC2/
WO[2]
- - - - - - - CCL/
OUT[0]
Note:
1. All analog pin functions are on the peripheral function B. The peripheral function B must be
selected to disable the digital control of the pin. The AC has analog signals on the peripheral
function B and digital signals on the peripheral function M.
2. The pins used by the SERCOM in I
2
C mode are listed in section SERCOM I
2
C Configurations.
3. The following High Sink pins have different properties than the regular pins:
PA08, PA09, PA12, PA13, PA16, PA17, PA22, PA23, PD08, PD09.
4. Clusters of multiple GPIO pins are sharing the same supply pin.
5. When TRACE is used in single-wire debug mode, PC27 assumes the role of SWO. In other debug
modes, PB30 assumes the SWO functionality.
6. GRXDV is available on PA16 for the 64-pin package only.
Important: Not all signals are available on all devices. Refer to the Configuration Summary for
available peripherals.
Related Links
6.2.6 SERCOM I2C Configurations
6.2.9 GPIO Clusters
6.2 Other Functions
6.2.1 Oscillator Pinout
The oscillators are not mapped to the normal PORT functions and their multiplexing is controlled by
registers in the Oscillators Controller (OSCCTRL) and in the 32K Oscillators Controller (OSC32KCTRL).
SAM D5x/E5x Family Data Sheet
I/O Multiplexing and Considerations
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 36