Datasheet

21.12.3 Event Control in Clock/Calendar mode (CTRLA.MODE=2)
Name: EVCTRL
Offset: 0x04
Reset: 0x00000000
Property: PAC Write-Protection, Enable-Protected
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
TAMPEVEI
Access
R/W
Reset 0
Bit 15 14 13 12 11 10 9 8
OVFEO TAMPEREO ALARMEO1 ALARMEO0
Access
R/W R/W R/W R/W
Reset 0 0 0 0
Bit 7 6 5 4 3 2 1 0
PEREO7 PEREO6 PEREO5 PEREO4 PEREO3 PEREO2 PEREO1 PEREO0
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 16 – TAMPEVEI Tamper Event Input Enable
Value Description
0
Tamper event input is disabled, and incoming events will be ignored.
1
Tamper event input is enabled, and all incoming events will capture the CLOCK value.
Bit 15 – OVFEO Overflow Event Output Enable
Value Description
0
Overflow event is disabled and will not be generated.
1
Overflow event is enabled and will be generated for every overflow.
Bit 14 – TAMPEREO Tamper Event Output Enable
Value Description
0
Tamper event output is disabled, and will not be generated
1
Tamper event output is enabled, and will be generated for every tamper input.
Bits 8, 9 – ALARMEOn Alarm n Event Output Enable [n = 1..0]
Value Description
0
Alarm n event is disabled and will not be generated.
1
Alarm n event is enabled and will be generated for every compare match.
Bits 0, 1, 2, 3, 4, 5, 6, 7 – PEREOn Periodic Interval n Event Output Enable [n = 7..0]
SAM D5x/E5x Family Data Sheet
RTC – Real-Time Counter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 356