Datasheet

...........continued
Offset Name Bit Pos.
0x88 BKUP2
7:0 BKUP[7:0]
15:8 BKUP[15:8]
23:16 BKUP[23:16]
31:24 BKUP[31:24]
0x8C BKUP3
7:0 BKUP[7:0]
15:8 BKUP[15:8]
23:16 BKUP[23:16]
31:24 BKUP[31:24]
0x90 BKUP4
7:0 BKUP[7:0]
15:8 BKUP[15:8]
23:16 BKUP[23:16]
31:24 BKUP[31:24]
0x94 BKUP5
7:0 BKUP[7:0]
15:8 BKUP[15:8]
23:16 BKUP[23:16]
31:24 BKUP[31:24]
0x98 BKUP6
7:0 BKUP[7:0]
15:8 BKUP[15:8]
23:16 BKUP[23:16]
31:24 BKUP[31:24]
0x9C BKUP7
7:0 BKUP[7:0]
15:8 BKUP[15:8]
23:16 BKUP[23:16]
31:24 BKUP[31:24]
21.10 Register Description - Mode 1 - 16-Bit Counter
This Register Description section is valid if the RTC is in COUNT16 mode (CTRLA.MODE=1).
Registers can be 8, 16, or 32 bits wide. Atomic 8-, 16-, and 32-bit accesses are supported. In addition,
the 8-bit quarters and 16-bit halves of a 32-bit register, and the 8-bit halves of a 16-bit register can be
accessed directly.
Some registers require synchronization when read and/or written. Synchronization is denoted by the
"Read-Synchronized" and/or "Write-Synchronized" property in each individual register description.
Optional write protection by the Peripheral Access Controller (PAC) is denoted by the "PAC Write
Protection" property in each individual register description.
Some registers are enable-protected, meaning they can only be written when the module is disabled.
Enable protection is denoted by the "Enable-Protected" property in each individual register description.
SAM D5x/E5x Family Data Sheet
RTC – Real-Time Counter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 325