Datasheet

Table Of Contents
6. I/O Multiplexing and Considerations
6.1 Multiplexed Signals
By default each pin is controlled by the PORT as a general purpose I/O, and alternatively it can be
assigned a different peripheral functions. To enable a peripheral function on a pin, the Peripheral
Multiplexer Enable bit in the Pin Configuration register corresponding to that pin (PINCFGn.PMUXEN, n =
0-31) in the PORT must be written to '1'. The selection of peripheral functions, A to N, is done by writing
to the Peripheral Multiplexing Odd and Even bits in the Peripheral Multiplexing register
(PMUXn.PMUXE/O) of the PORT. The table below describes the peripheral signals multiplexed to the
PORT I/O pins.
Important:  Not all signals are available on all devices. Refer to the Configuration Summary for
available peripherals.
Table 6-1. Multiplexed Peripheral Signals
VQFN 48
TQFP/VQFN/WLCSP 64
TQFP 100
TFBGA
120
TQFP 128
Pad
Name
A B C D E F G H I J K L M N
EIC ANARE
F
ADC0 ADC1 AC DAC PTC SERCO
M
SERCO
M
TC TCC TCC,
PDEC
QSPI,
CAN1,
USB,
CORTE
X_CM4
SDHC,
CAN0
I
2
S PCC GMAC GCLK,
AC
CCL
48 64/C6 100 B2 128 PB03 EIC/
EXTIN
T[3]
- ADC0/
AIN[15]
- - - X21/Y2
1
- SERCO
M5/
PAD[1]
TC6/
WO[1]
- - - - - - - - -
1 01/B8 1 A1 1 PA00 EIC/
EXTIN
T[0]
- - - - - - SERCO
M1/
PAD[0]
TC2/
WO[0]
- - - - - - - - -
2 02/C8 2 B1 2 PA01 EIC/
EXTIN
T[1]
- - - - - - SERCO
M1/
PAD[1]
TC2/
WO[1]
- - - - - - - - -
3 C1 3 PC00 EIC/
EXTIN
T[0]
- - ADC1/
AIN[10]
- - - - - - - - - - - - - -
4 C2 4 PC01 EIC/
EXTIN
T[1]
- - ADC1/
AIN[11]
- - - - - - - - - - - - - -
5 D1 7 PC02 EIC/
EXTIN
T[2]
- - ADC1/
AIN[4]
- - - - - - - - - - - - - -
6 E2 8 PC03 EIC/
EXTIN
T[3]
- - ADC1/
AIN[5]
- - - - - - - - - - - - - -
3 03/C7 7 E1 9 PA02 EIC/
EXTIN
T[2]
- ADC0/
AIN[0]
- - DAC/
VOUT[0
]
- - - - - - - - - - - -
4 04/D6 8 F2 10 PA03 EIC/
EXTIN
T[3]
ANARE
F/
VREFA
ADC0/
AIN[1]
- - - X0/Y0 - - - - - - - - - - - -
05/D7 9 F1 11 PB04 EIC/
EXTIN
T[4]
- - ADC1/
AIN[6]
- - X22/Y2
2
- - - - - - - - - - - -
06/D8 10 G1 12 PB05 EIC/
EXTIN
T[5]
- - ADC1/
AIN[7]
- - X23/Y2
3
- - - - - - - - - - - -
- G2 13 PD00 EIC/
EXTIN
T[0]
- - ADC1/
AIN[14]
- - - - - - - - - - - - - -
- H1 16 PD01 EIC/
EXTIN
T[1]
- - ADC1/
AIN[15]
- - - - - - - - - - - - - -
09/E7 13 H2 17 PB06 EIC/
EXTIN
T[6]
- - ADC1/
AIN[8]
- - X24/Y2
4
- - - - - - - - - - - CCL/
IN[6]
10/E6 14 J1 18 PB07 EIC/
EXTIN
T[7]
- - ADC1/
AIN[9]
- - X25/Y2
5
- - - - - - - - - - - CCL/
IN[7]
SAM D5x/E5x Family Data Sheet
I/O Multiplexing and Considerations
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 32