Datasheet

The counter clock CLK_WDT_OSC is asynchronous to the bus clock (CLK_WDT_APB). Due to this
asynchronicity, writing to certain registers will require synchronization between the clock domains. Refer
to 20.6.7 Synchronization for further details.
Related Links
15.6.2.6 Peripheral Clock Masking
29. OSC32KCTRL – 32KHz Oscillators Controller
20.5.4 DMA
Not applicable.
20.5.5 Interrupts
The interrupt request line is connected to the interrupt controller. Using the WDT interrupt(s) requires the
interrupt controller to be configured first.
Related Links
10.2 Nested Vector Interrupt Controller
20.5.6 Events
Not applicable.
20.5.7 Debug Operation
When the CPU is halted in debug mode the WDT will halt normal operation.
20.5.8 Register Access Protection
All registers with write access can be write-protected optionally by the Peripheral Access Controller
(PAC), except for the following registers:
• Interrupt Flag Status and Clear (INTFLAG) register
Optional write protection by the Peripheral Access Controller (PAC) is denoted by the "PAC Write
Protection" property in each individual register description.
PAC write protection does not apply to accesses through an external debugger.
20.5.9 Analog Connections
Not applicable.
20.6 Functional Description
20.6.1 Principle of Operation
The Watchdog Timer (WDT) is a system for monitoring correct program operation, making it possible to
recover from error situations such as runaway code, by issuing a Reset. When enabled, the WDT is a
constantly running timer that is configured to a predefined time-out period. Before the end of the time-out
period, the WDT should be set back, or else, a system Reset is issued.
The WDT has two modes of operation, Normal mode and Window mode. Both modes offer the option of
Early Warning interrupt generation. The description for each of the basic modes is given below. The
settings in the Control A register (CTRLA) and the Interrupt Enable register (handled by INTENCLR/
INTENSET) determine the mode of operation:
SAM D5x/E5x Family Data Sheet
WDT – Watchdog Timer
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 267