Datasheet

The STATUS.VCORERDY bit is set to '1' as soon as the VDDCORE voltage has reached the target
voltage. During voltage transition, STATUS.VCORERDY will read '0'. The Voltage Ready interrupt
(VCORERDY) can be used to detect a 0-to-1 transition of STATUS.VCORERDY, see also 19.5.5
Interrupts.
When entering the Standby, Hibernate, or Backup Sleep mode, and when no sleepwalking task is
requested, the VDDCORE Voltage scaling control is not used.
19.6.1.5 Sleep Mode Operation
In Standby and Hibernate mode, the main voltage regulator (MAINVREG) operates in low power mode.
In backup mode, the low-power voltage regulator (LPVREG) is used to supply VDDCORE.
19.6.2 Voltage Reference System Operation
The reference voltages are generated by a functional block DETREF inside of the SUPC. DETREF is
providing a fixed-voltage source, BANDGAP=1.1V, and a variable voltage, VREF.
19.6.2.1 Initialization
The voltage reference output and the temperature sensor are disabled after any Reset.
19.6.2.2 Enabling, Disabling, and Resetting
The voltage reference output is enabled/disabled by setting/clearing the Voltage Reference Output
Enable bit in the Voltage Reference register (VREF.VREFOE).
The temperature sensor is enabled/disabled by setting/clearing the Temperature Sensor Enable bit in the
Voltage Reference register (VREF.TSEN).
Note: When VREF.ONDEMAND=0, it is not recommended to enable both voltage reference output and
temperature sensor at the same time - only the voltage reference output will be present at both ADC
inputs.
19.6.2.3 Selecting a Voltage Reference
The Voltage Reference Selection bit field in the VREF register (VREF.SEL) selects the voltage of VREF
to be applied to analog modules, e.g. the ADC.
SAM D5x/E5x Family Data Sheet
SUPC – Supply Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 239