Datasheet

19.5.1 I/O Lines
I/O lines are configured by SUPC when the SUPC output (signal OUT) is enabled. The I/O lines need no
user configuration.
19.5.2 Power Management
The SUPC can operate in all sleep modes except backup sleep mode. BOD33 and Battery backup Power
Switch can operate in backup mode.
Related Links
18. PM – Power Manager
19.5.3 Clocks
The SUPC bus clock (CLK_SUPC_APB) can be enabled and disabled in the Main Clock module.
A 32KHz clock, asynchronous to the user interface clock (CLK_SUPC_APB), is required to run BOD33
and in sampled mode. Due to this asynchronicity, writing to certain registers will require synchronization
between the clock domains. Refer to 19.6.7 Synchronization for further details.
Related Links
29. OSC32KCTRL – 32KHz Oscillators Controller
15.6.2.6 Peripheral Clock Masking
19.5.4 DMA
Not applicable.
19.5.5 Interrupts
The interrupt request lines are connected to the interrupt controller. Using the SUPC interrupts requires
the interrupt controller to be configured first.
Related Links
10.2 Nested Vector Interrupt Controller
19.5.6 Events
Not applicable.
19.5.7 Debug Operation
When the CPU is halted in debug mode, the SUPC continues normal operation. If the SUPC is configured
in a way that requires it to be periodically serviced by the CPU through interrupts or similar, improper
operation or data loss may result during debugging.
If a cold plug-in is detected by the system, BOD33 and BOD12 will use the factory calibration setting
instead of the user calibration. In hot plug-in, the BODs resets keep running.
19.5.8 Register Access Protection
Registers with write access can be write-protected optionally by the Peripheral Access Controller (PAC).
Note: Not all registers with write access can be write-protected.
PAC write protection is not available for the following registers:
• Interrupt Flag Status and Clear register (INTFLAG)
Optional PAC write protection is denoted by the "PAC Write-Protection" property in each individual
register description.
SAM D5x/E5x Family Data Sheet
SUPC – Supply Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 237