Datasheet

18.5.1 I/O Lines
Not applicable.
18.5.2 Clocks
The PM bus clock (CLK_PM_APB) can be enabled and disabled in the Main Clock module. If this clock is
disabled, it can only be re-enabled by a system reset.
18.5.3 DMA
Not applicable.
18.5.4 Interrupts
The interrupt request line is connected to the interrupt controller. Using the PM interrupt requires the
interrupt controller to be configured first.
18.5.5 Events
Not applicable.
18.5.6 Debug Operation
When the CPU is halted in debug mode, the PM continues normal operation. If standby sleep mode is
requested by the system while in debug mode, the power domains are not turned off. As a consequence,
power measurements while in debug mode are not relevant.
If Hibernate or Backup sleep mode is requested by the system while in debug mode, the core domains
are kept on, and the debug modules are kept running to allow the debugger to access internal registers.
When exiting the hibernate or backup mode upon a reset condition, the core domains are reset except
the debug logic, allowing users to keep using their current debug session.
If OFF sleep mode is requested while in debug mode, the core domains are reset.
Hot plugging in standby mode is supported.
Hot plugging in Hibernate or backup mode or OFF mode is not supported as the DSU module is not
powered.
Cold plugging in Hibernate or backup or OFF mode is supported if the external reset duration is superior
to the corresponding sleep mode wakeup time (See Electrical characteristic chapter).
Backup wakeup time is less than 200us in typical case. This value can be higher if voltage scaling in
SUPC is enabled. Refers to SUPC for details.
18.5.7 Register Access Protection
Registers with write access can be write-protected optionally by the Peripheral Access Controller (PAC).
PAC write protection is not available for the following registers:
• Interrupt Flag register (INTFLAG). Refer to 18.8.5 INTFLAG for details
Optional PAC write protection is denoted by the "PAC Write-Protection" property in each individual
register description.
Write-protection does not apply to accesses through an external debugger.
18.5.8 Analog Connections
Not applicable.
SAM D5x/E5x Family Data Sheet
PM – Power Manager
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 215