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CPU is running on Flash with 2 wait states, at 48 MHz
PTC running at 4 MHz
PTC Configuration
Mutual Capacitance mode
One touch channel
System Configuration
Standby Sleep mode enabled
RTC running on ULP32K: used to define the PTC scan rate, through the event system
RTC interrupts (wake up) the CPU to perform PTC scans
Table 56-19. Power Consumption
(1)
Symbol Parameters
PTC scan
rate (msec)
Oversamples T
A
Typ. Max. Units
IDD Current Consumption
10
4
Max. 125°C Typ
25°C
137 3960
µA
16 146 3989
50
4 77 3882
16 79 3893
100
4 68 3877
16 69 3885
200
4 64 3870
16 65 3872
Note: 
1. These values are based on characterization.
56.7 NVM Characteristics (125°C)
Table 56-20. NVM Flash Read Wait States for Worst Case Conditions
CPU Fmax (MHz) 0 WS 1 WS 2 WS 3 WS 4 WS 5 WS 6 WS Auto WS
Read Operations 1 cycle 2 cycles 3 cycles 4 cycles 5 cycles 6 cycles 7 cycles n cycles
VDD > 1.71V 19 38 57 76 95 100 100 100
Maximum operating frequencies are given in the table above, but are limited by the Embedded Flash
access time when the processor is fetching code out of it. Theses tables provide the device maximum
operating frequency defined by the field RWS of the NVMCTRL CTRLA register when automatic wait
states (AUTOWS) is disabled. This field defines the number of Wait states required to access the
Embedded Flash Memory.
SAM D5x/E5x Family Data Sheet
Electrical Characteristics at 125°C
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 2068