Datasheet

Note:
1. These values are based on simulation. They are not covered by production test limits or
characterization.
Table 54-29. Differential Mode
(1)
Symbol Parameters Conditions Min. Typ. Max. Unit
INL Integral Non Linearity,
Best-fit curve from 0x080 to
0xF7F
i12clk = 12 MHz, V
DDANA
= 3.0V, External Ref. =
2.0V, C
LOAD
= 50 pF
- ±2.4 ±3.4 LSB
i12clk = 12 MHz, V
DDANA
= 3.0V, Internal Ref,
C
LOAD
= 50 pF
- ±3.2 ±4.2
DNL Differential Non Linearity,
Best-fit curve from 0x080 to
0xF7F
i12clk = 12 MHz, V
DDANA
= 3.0V, External Ref. =
2.0V, C
LOAD
= 50 pF
- ±2.4 ±3.6 LSB
i12clk = 12 MHz, V
DDANA
= 3.0V, Internal Ref,
C
LOAD
= 50 pF
- ±3.5 ±5.4
Gerr Gain Error External Reference voltage - ±0.4 ±1.7 % FSR
1.0V Internal Reference voltage - ±0.8 ±7.0
Offerr Offset Error External Reference voltage - ±13 ±40 mV
1.0V Internal Reference voltage - ±8 ±64
ENOB Effective Number Of Bits Fs = 1 Ms/s - External Ref - CCTRL = 0x2 9.9 10.7 10.9 Bits
SNR Signal to Noise ratio 63.5 68.6 72.6 dB
THD Total Harmonic Distortion -79.1 -72.5 -61.0 dB
Note:
1. These values are based on characterization. These values are not covered by test limits in
production.
Table 54-30. Single-Ended Mode
(1)
Symbol Parameters Conditions Min. Typ. Max. Unit
INL Integral Non Linearity,
Best-fit curve from 0x080 to
0xF7F
i12clk = 12 MHz, V
DDANA
= 3.0V External Ref. =
2.0V, C
LOAD
= 50 pF
- ±2.7 ±4.0 LSB
i12clk = 12 MHz V
DDANA
= 3.0V, Internal Ref,
C
LOAD
= 50 pF
- ±5.2 8.2
DNL Differential Non Linearity,
Best-fit curve from 0x080 to
0xF7F
i12clk = 12 MHz, V
DDANA
= 3.0V External Ref =
2.0V, C
LOAD
= 50 pF
- ±3.5 ±6.1 LSB
i12clk = 12 MHz V
DDANA
= 3.0V, Internal Ref,
C
LOAD
= 50 pF
- ±6.4 ±9.4
Gerr Gain Error External Reference voltage - ±0.3 ±1.5 % FSR
1.0V Internal Reference voltage - ±0.8 ±6.9
SAM D5x/E5x Family Data Sheet
Electrical Characteristics at 85°C
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 2006