Datasheet

Table Of Contents

The flag is cleared by writing a '1' to this bit location.

Outside of HALL mode, this bits is always read '0'.

Bit 4 – WINERR Window Error Flag

This flag is set when the counter is outside the window monitor.

The flag is cleared by writing a '1' to this bit location.

Outside of HALL mode, this bits is always read '0'.

Bit 2 – MPERR Missing Pulse Error flag

This flag is set when a missing pulse error condition is detected.

The flag is cleared by writing a '1' to this bit location.

Outside of QDEC mode, this bits is always read '0'.

Bit 1 – IDXERR Index Error Flag

This flag is set when an index error condition is detected.

The flag is cleared by writing a '1' to this bit location.

Outside of QDEC mode, this bits is always read '0'.

Bit 0 – QERR Quadrature Error Flag

This flag is set when an invalid QDEC transition is detected.

The flag is cleared by writing a '1' to this bit location.

Outside of QDEC mode, this bits is always read '0'.

SAM D5x/E5x Family Data Sheet

PDEC – Position Decoder

Datasheet

DS60001507E-page 1975