Datasheet

Table Of Contents
52.8.7 Write Protection Mode Register
Name:  WPMR
Offset:  0xE0
Reset:  0x00000000
Property:  -
Bit 31 30 29 28 27 26 25 24
WPKEY[23:16]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
WPKEY[15:8]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
WPKEY[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
WPEN
Access
R/W
Reset 0
Bits 31:8 – WPKEY[23:0] Write Protection Key
Value Name Description
0x50434
3
PASSWD Writing any other value in this field aborts the write operation of the WPEN bit.
Always reads as 0.
Bit 0 – WPEN Write Protection Enable
Value Description
0
Disables the write protection if WPKEY corresponds to 0x504343 (“PCC” in ASCII).
1
Enables the write protection if WPKEY corresponds to 0x504343 (“PCC” in ASCII).
SAM D5x/E5x Family Data Sheet
PCC - Parallel Capture Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1944