Datasheet

51.9.2 Clock Unit n Control
Name: CLKCTRL
Offset: 0x04 + n*0x04 [n=0..1]
Reset: 0x00000000
Property: Enable-Protected, PAC Write-Protection
Bit 31 30 29 28 27 26 25 24
MCKOUTDIV[5:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
MCKDIV[5:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
MCKOUTINV MCKEN MCKSEL SCKOUTINV SCKSEL FSOUTINV FSINV FSSEL
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
BITDELAY FSWIDTH[1:0] NBSLOTS[2:0] SLOTSIZE[1:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 29:24 – MCKOUTDIV[5:0] Master Clock Output Division Factor
The generic clock selected by MCKSEL is divided by (MCKOUTDIV + 1) to obtain the Master Clock n
output.
Bits 21:16 – MCKDIV[5:0] Master Clock Division Factor
The Master Clock n is divided by (MCKDIV + 1) to obtain the Serial Clock n.
Bit 15 – MCKOUTINV Master Clock Output Invert
Value Description
0
The Master Clock n is output without inversion.
1
The Master Clock n is inverted before being output.
Bit 14 – MCKEN Master Clock Enable
Note: MCKEN will not enable the clock output when in Slave mode.
Value Description
0
The Master Clock n division and output is disabled.
1
The Master Clock n division and output is enabled.
Bit 13 – MCKSEL Master Clock Select
This field selects the source of the Master Clock n.
SAM D5x/E5x Family Data Sheet
I2S - Inter-IC Sound Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1909