Datasheet

In TDM format, number slots can be configured up to 8 slots. If 4 slots are configured, each frame
consists of 4 data words.
In PDM format, continuous 1-bit data samples are available on the SDI line for each SCKn rising and
SCKn falling edge as in case of a MEMS microphone with PDM interface.
1-channel burst transfer with non-periodic Frame Sync mode is useful typically for passing control non-
auto data as in case of DSP. In Burst mode, a single Data transfer starts at each Frame Sync pulse, and
these pulses are 1-bit wide and occur only when a Data transfer is requested.
Sections 51.6.4 I2S Format - Reception and Transmission Sequence with Word Select, 51.6.5 TDM
Format - Reception and Transmission Sequence and 51.7 I2S Application Examples describe more
about frame/data formats and register settings required for different I
2
S applications.
Figure 51-3. I
2
S Functional Block Diagram
CLK_I2S_APB
GCLK_I2S_0
MCK0 SCK0 FS0
SDO
Clock Unit 0
CLKCTRL0
APB / DMA
Interface
Tx Frame
Sequencer
Tx
Word
FSM
Tx
Word
Serializer
Tx
Word
Formatting
TXCTRL
Transmit Serializer
TXDATA
Receive Serializer
RXDATA
RXCTRL
Rx
Word
Formatting
Rx Frame
Sequencer
Rx
Word
FSM
Rx
Word
Serializer
SDI
GCLK_I2S_1
Clock Unit 1
CLKCTRL1
MCK1 SCK1 FS1
51.6.1.1 Initialization
The I
2
S features two Clock Units, one Transmit Serializer, and One Receive Serializer. The Transmit
Serializer uses Clock Unit 0, while the Receive Serializer can either share the same Clock Unit 0 or use
the Clock Unit 1.
Before enabling the I
2
S, the following registers must be configured:
• Clock Control registers (CLKCTRLn)
• Serializer Control registers (TXCTRL and/or RXCTRL)
In Master mode, one of the generic clocks for the I
2
S must also be configured to operate at the required
frequency, as described in 51.6.1 Principle of Operation.
• fs is the sampling frequency that defines the frame period
• CLKCTRLn.NBSLOTS defines the number of slots in each frame
• CLKCTRLn.SLOTSIZE defines the number of bits in each slot
• SCKn frequency must be f
SCKn
= fs × number_of_slots × number_of_bits_per_slot)
SAM D5x/E5x Family Data Sheet
I2S - Inter-IC Sound Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1893