Datasheet

Value Description
0
The APBA clock for the RTC is stopped.
1
The APBA clock for the RTC is enabled.
Bit 8 – WDT WDT APBA Clock Enable
Value Description
0
The APBA clock for the WDT is stopped.
1
The APBA clock for the WDT is enabled.
Bit 7 – GCLK GCLK APBA Clock Enable
Value Description
0
The APBA clock for the GCLK is stopped.
1
The APBA clock for the GCLK is enabled.
Bit 6 – SUPC SUPC APBA Clock Enable
Value Description
0
The APBA clock for the SUPC is stopped.
1
The APBA clock for the SUPC is enabled.
Bit 5 – OSC32KCTRL OSC32KCTRL APBA Clock Enable
Value Description
0
The APBA clock for the OSC32KCTRL is stopped.
1
The APBA clock for the OSC32KCTRL is enabled.
Bit 4 – OSCCTRL OSCCTRL APBA Clock Enable
Value Description
0
The APBA clock for the OSCCTRL is stopped.
1
The APBA clock for the OSCCTRL is enabled.
Bit 3 – RSTC RSTC APBA Clock Enable
Value Description
0
The APBA clock for the RSTC is stopped.
1
The APBA clock for the RSTC is enabled.
Bit 2 – MCLK MCLK APBA Clock Enable
Value Description
0
The APBA clock for the MCLK is stopped.
1
The APBA clock for the MCLK is enabled.
Bit 1 – PM PM APBA Clock Enable
Value Description
0
The APBA clock for the PM is stopped.
1
The APBA clock for the PM is enabled.
Bit 0 – PAC PAC APBA Clock Enable
Value Description
0
The APBA clock for the PAC is stopped.
1
The APBA clock for the PAC is enabled.
SAM D5x/E5x Family Data Sheet
MCLK – Main Clock
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 189