Datasheet

Table Of Contents
51. I2S - Inter-IC Sound Controller
51.1 Overview
The Inter-IC Sound Controller (I
2
S) provides bidirectional, synchronous and digital audio link with external
audio devices.
This controller is compliant with the Inter-IC Sound (I
2
S) bus specification. It supports TDM interface with
external multi-slot audio codecs. It also supports PDM interface with external MEMS microphones.
The I
2
S consists of two Clock Units, one Transmit Serializer, and one Receive Serializer, that can be
enabled separately, to provide Master, Slave, or controller modes.
The pins associated with I2S peripheral are SDO,SDI, FSn, SCKn, and MCKn pins.
Peripheral DMAC channels, separate for each Serializer, allow a continuous high bitrate data transfer
without processor intervention to the following:
Audio codecs in Master, Slave, or Controller mode
Stereo DAC or ADC through dedicated I
2
S serial interface
Multi-slot or multiple stereo DACs or ADCs, using the TDM format
Mono or stereo MEMS microphones, using the PDM interface
Each Serializer supports using either a single DMAC channel for all data channels, or two separate
DMAC channels for different data channels.
The I
2
S supports 8-bit and 16-bit compact stereo format. This helps in reducing the required DMA
bandwidth by transferring the left and right samples within the same data word.
Usually, an external audio codec or digital signal processor (DSP) requires a clock which is a multiple of
the sampling frequency fs (for example, 384×fs). The I
2
S peripheral in Master Mode and Controller mode
is capable of outputting an output clock ranging from 16×fs to 1024×fs on the Master Clock pin (MCKn).
The Master Clock pin cannot output a clock signal when in Slave Mode.
51.2 Features
Compliant with Inter-IC Sound (I
2
S) bus specification
Supported data formats:
32-, 24-, 20-, 18-, 16-, and 8-bit mono or stereo format
16- and 8-bit compact stereo format, with left and right samples packed in the same word to
reduce data transfers
Supported data frame formats:
2-channel I
2
S with Word Select
1- to 8-slot Time Division Multiplexed (TDM) with Frame Sync and individually enabled slots
1- or 2-channel Pulse Density Modulation (PDM) reception for MEMS microphones
1-channel burst transfer with non-periodic Frame Sync
2 independent Clock Units handling either the same clock or separate clocks for the Serializers:
Suitable for a wide range of sample frequencies fs, including 32kHz, 44.1kHz, 48kHz, 88.2kHz,
96kHz, and 192kHz
16×fs to 1024×fs Master Clock generated for external audio CODECs
SAM D5x/E5x Family Data Sheet
I2S - Inter-IC Sound Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1888