Datasheet

49.8.15 Pattern
Name: PATT
Offset: 0x38
Reset: 0x0000
Property: Write-Synchronized
Bit 15 14 13 12 11 10 9 8
PGV[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
PGE[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 15:8 – PGV[7:0] Pattern Generation Output Value
This register holds the values of pattern for each waveform output.
Bits 7:0 – PGE[7:0] Pattern Generation Output Enable
This register holds the enable status of pattern generation for each waveform output. A bit written to '1'
will override the corresponding SWAP output with the corresponding PGVn value.
SAM D5x/E5x Family Data Sheet
TCC – Timer/Counter for Control Applications
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1872