Datasheet

Figure 49-34. Waveform Extension Stage Details
OTMX[x]
DTIx
LS
HS
OTMX[x+WO_NUM/2]
DTIxEN SWAPx
PGO[x+WO_NUM/2]
PGO[x]
PGV[x+WO_NUM/2]
PGV[x]
INV[x+WO_NUM/2]
P[x+WO_NUM/2]
INV[x]
P[x]
PORTSWEX
OTMX
OTMX DTI SWAP PATTERN
The output matrix (OTMX) unit distributes compare channels, according to the selectable configurations
in the following table.
Table 49-4. Output Matrix Channel Pin Routing Configuration
Value OTMX[7] OTMX[6] OTMX[5] OTMX[4] OTMX[3] OTMX[2] OTMX[1] OTMX[0]
0x0 CC1 CC0 CC5 CC4 CC3 CC2 CC1 CC0
0x1 CC1 CC0 CC2 CC1 CC0 CC2 CC1 CC0
0x2 CC0 CC0 CC0 CC0 CC0 CC0 CC0 CC0
0x3 CC1 CC1 CC1 CC1 CC1 CC1 CC1 CC0
• Configuration 0x0 is the default configuration. The channel location is the default one and channels
are distributed on outputs modulo the number of channels. Channel 0 is routed to the Output matrix
output OTMX[0], and Channel 1 to OTMX[1]. If there are more outputs than channels, then channel 0
is duplicated to the Output matrix output OTMX[CC_NUM], channel 1 to OTMX[CC_NUM+1] and so
on.
• Configuration 0x1 distributes the channels on output modulo half the number of channels. This
assigns twice the number of output locations to the lower channels than the default configuration.
This can be used, for example, to control the four transistors of a full bridge using only two compare
channels.
Using pattern generation, some of these four outputs can be overwritten by a constant level, enabling
flexible drive of a full bridge in all quadrant configurations.
• Configuration 0x2 distributes compare channel 0 (CC0) to all port pins. With pattern generation, this
configuration can control a stepper motor.
• Configuration 0x3 distributes the compare channel CC0 to the first output, and the channel CC1 to all
other outputs. Together with pattern generation and the fault extension, this configuration can control
up to seven LED strings, with a boost stage.
The table below is an example showing four compare channels on four outputs.
Table 49-5. Four Compare Channels on Four Outputs
Value OTMX[3] OTMX[2] OTMX[1] OTMX[0]
0x0 CC3 CC2 CC1 CC0
0x1 CC1 CC0 CC1 CC0
SAM D5x/E5x Family Data Sheet
TCC – Timer/Counter for Control Applications
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1829