Datasheet

48.7.3.1 Control A
Name: CTRLA
Offset: 0x00
Reset: 0x00000000
Property: PAC Write-Protection, Write-Synchronized, Enable-Protected
Bit 31 30 29 28 27 26 25 24
CAPTMODE1[1:0] CAPTMODE0[1:0]
Access
R/W R/W R/W R/W
Reset 0 0 0 0
Bit 23 22 21 20 19 18 17 16
COPEN1 COPEN0 CAPTEN1 CAPTEN0
Access
R/W R/W R/W R/W
Reset 0 0 0 0
Bit 15 14 13 12 11 10 9 8
DMAOS ALOCK PRESCALER[2:0]
Access
R/W R/W R/W R/W R/W
Reset 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
ONDEMAND RUNSTDBY PRESCSYNC[1:0] MODE[1:0] ENABLE SWRST
Access
R/W R/W R/W R/W R/W R/W R/W W
Reset 0 0 0 0 0 0 0 0
Bits 28:27 – CAPTMODE1[1:0] Capture mode Channel 1
These bits select the channel 1 capture mode.
Value Name Description
0x0
DEFAULT Default capture
0x1
CAPTMIN Minimum capture
0x2
CAPTMAX Maximum capture
0x3
Reserved
Bits 25:24 – CAPTMODE0[1:0] Capture mode Channel 0
These bits select the channel 0 capture mode.
Value Name Description
0x0
DEFAULT Default capture
0x1
CAPTMIN Minimum capture
0x2
CAPTMAX Maximum capture
0x3
Reserved
Bits 20, 21 – COPENx Capture On Pin x Enable
Bit x of COPEN[1:0] selects the trigger source for capture operation, either events or I/O pin input.
Value Description
0
Event from Event System is selected as trigger source for capture operation on channel x.
1
I/O pin is selected as trigger source for capture operation on channel x.
SAM D5x/E5x Family Data Sheet
TC – Timer/Counter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1778