Datasheet

48.7.2.15 Channel x Compare Buffer Value, 16-bit Mode
Name: CCBUFx
Offset: 0x30 + x*0x02 [x=0..1]
Reset: 0x0000
Property: Write-Synchronized
Bit 15 14 13 12 11 10 9 8
CCBUF[15:8]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
CCBUF[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 15:0 – CCBUF[15:0] Channel x Compare Buffer Value
These bits hold the value of the Channel x Compare Buffer Value. When the buffer valid flag is '1' and
double buffering is enabled (CTRLBCLR.LUPD=1), the data from buffer registers will be copied into the
corresponding CCx register under UPDATE condition (CTRLBSET.CMD=0x3), including the software
update command.
SAM D5x/E5x Family Data Sheet
TC – Timer/Counter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1775