Datasheet

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1741

Table Of Contents

48.7.1.7 Interrupt Flag Status and Clear

Name: INTFLAG

Offset: 0x0A

Reset: 0x00

Property: -

Bit 7 6 5 4 3 2 1 0

MC1 MC0 ERR OVF

Access

R/W R/W R/W R/W

Reset 0 0 0 0

Bit 5 – MC1 Match or Capture Channel x

This flag is set on a comparison match, or when the corresponding CCx register contains a valid capture

value. This flag is set on the next CLK_TC_CNT cycle, and will generate an interrupt request if the

corresponding Match or Capture Channel x Interrupt Enable bit in the Interrupt Enable Set register

(INTENSET.MCx) is '1'.

Writing a '0' to one of these bits has no effect.

Writing a '1' to one of these bits will clear the corresponding Match or Capture Channel x interrupt flag

In capture operation, this flag is automatically cleared when CCx register is read.

Bit 4 – MC0 Match or Capture Channel x

This flag is set on a comparison match, or when the corresponding CCx register contains a valid capture

value. This flag is set on the next CLK_TC_CNT cycle, and will generate an interrupt request if the

corresponding Match or Capture Channel x Interrupt Enable bit in the Interrupt Enable Set register

(INTENSET.MCx) is '1'.

Writing a '0' to one of these bits has no effect.

Writing a '1' to one of these bits will clear the corresponding Match or Capture Channel x interrupt flag

In capture operation, this flag is automatically cleared when CCx register is read.

Bit 1 – ERR Error Interrupt Flag

This flag is set when a new capture occurs on a channel while the corresponding Match or Capture

Channel x interrupt flag is set, in which case there is nowhere to store the new capture.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the Error interrupt flag.

Bit 0 – OVF Overflow Interrupt Flag

This flag is set on the next CLK_TC_CNT cycle after an overflow condition occurs, and will generate an

interrupt request if INTENCLR.OVF or INTENSET.OVF is '1'.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the Overflow interrupt flag.

SAM D5x/E5x Family Data Sheet

TC – Timer/Counter

Datasheet

DS60001507E-page 1742