Datasheet

47.8.3 Event Control
Name: EVCTRL
Offset: 0x02
Reset: 0x00
Property: PAC Write-Protection
Bit 7 6 5 4 3 2 1 0
RESRDYEO1 RESRDYEO0 INVEI1 INVEI0 EMPTYEO1 EMPTYEO0 STARTEI1 STARTEI0
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 – RESRDYEO1 Enable Result Ready of Filter 1 output event
This bit controls whether the RESRDY1 Event is enabled when the interpolated data is ready.
Value Description
0
Interpolated Data Ready Event is disabled
1
Interpolated Data Ready Event is enabled
Bit 6 – RESRDYEO0 Enable Result Ready of Filter 0 output event
This bit controls whether the RESRDY0 Event is enabled when the interpolated data is ready.
Value Description
0
Interpolated Data Ready Event is disabled
1
Interpolated Data Ready Event is enabled
Bit 5 – INVEI1 Enable Inversion of DAC1 Start Conversion Input Event
This bit defines the detection of the input event for DAC1 START.
Value Description
0
Input event source is not inverted.
1
Input event source is inverted.
Bit 4 – INVEI0 Enable Inversion of DAC0 Start Conversion Input Event
This bit defines the detection of the input event for DAC0 START.
Value Description
0
Input event source is not inverted.
1
Input event source is inverted.
Bit 3 – EMPTYEO1 Data Buffer Empty Event Output DAC1
This bit indicates if the Data Buffer Empty Event output for DAC1 is enabled.
Value Description
0
Data Buffer Empty event is disabled.
1
Data Buffer Empty event is enabled.
Bit 2 – EMPTYEO0 Data Buffer Empty Event Output DAC0
This bit indicates if the Data Buffer Empty Event output for DAC0 is enabled.
Value Description
0
Data Buffer Empty event is disabled.
1
Data Buffer Empty event is enabled.
SAM D5x/E5x Family Data Sheet
DAC – Digital-to-Analog Converter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1688