Datasheet

Table 14-7. Generator Selection
Value Description
0x0 Generic Clock Generator 0
0x1 Generic Clock Generator 1
0x2 Generic Clock Generator 2
0x3 Generic Clock Generator 3
0x4 Generic Clock Generator 4
0x5 Generic Clock Generator 5
0x6 Generic Clock Generator 6
0x7 Generic Clock Generator 7
0x8 Generic Clock Generator 8
0x9 Generic Clock Generator 9
0xA Generic Clock Generator 10
0xB Generic Clock Generator 11
Table 14-8. Reset Value after a User Reset or a Power Reset
Reset PCHCTRLm.GEN PCHCTRLm.CHEN PCHCTRLm.WRTLOCK
Power Reset 0x0 0x0 0x0
User Reset If WRTLOCK = 0
: 0x0
If WRTLOCK = 1: no change
If WRTLOCK = 0
: 0x0
If WRTLOCK = 1: no change
No change
A Power Reset will reset all the PCHCTRLm registers.
A User Reset will reset a PCHCTRL if WRTLOCK=0, or else, the content of that PCHCTRL remains
unchanged.
The PCHCTRL register Reset values are shown in the table below, PCHCTRLm Mapping.
Table 14-9. PCHCTRLm Mapping
index(m) Name Description
0 GCLK_OSCCTRL_DFLL48 DFLL48 input clock source
1 GCLK_OSCCTRL_FDPLL0 Reference clock for FDPLL0
2 GCLK_OSCCTRL_FDPLL1 Reference clock for FDPLL1
3 GCLK_OSCCTRL_FDPLL0_32K
GCLK_OSCCTRL_FDPLL1_32K
GCLK_SDHC0_SLOW
GCLK_SDHC1_SLOW
GCLK_SERCOM[0..7]_SLOW
FDPLL0 32KHz clock for internal lock timer
FDPLL1 32KHz clock for internal lock timer
SDHC0 Slow
SDHC1 Slow
SERCOM[0..7] Slow
4 GCLK_EIC EIC
SAM D5x/E5x Family Data Sheet
GCLK - Generic Clock Controller
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 168