Datasheet

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Signal Description Type
VREFA External reference Analog input
One signal can be mapped on several pins.
Important:
When an analog peripheral is enabled, the analog output of the peripheral will interfere with the
alternative functions of the output pads. This is also true even when the peripheral is used for
internal purposes.
Analog inputs do not interfere with alternative pad functions.
Related Links
6. I/O Multiplexing and Considerations
47.5 Product Dependencies
In order to use this peripheral, other parts of the system must be configured correctly, as described below.
47.5.1 I/O Lines
Using the DAC Controller’s I/O lines requires the I/O pins to be configured in the PORT - I/O Pin
Controller.
Table 47-1. I/O Lines
Instance Signal Peripheral Function
DAC VOUT0 A
DAC VOUT1 A
DAC VREFA A
47.5.2 Power Management
The DAC Controller will continue to operate in any sleep mode where the selected source clock is
running.
The DAC Controller interrupts can be used to wake up the device from sleep modes.
Events connected to the event system can trigger other operations in the system without exiting sleep
modes.
Related Links
18. PM – Power Manager
47.5.3 Clocks
The DAC bus clock (CLK_DAC_APB) can be enabled and disabled in the Main Clock module, and the
default state of CLK_DAC_APB can be found in Peripheral Clock Masking.
A generic clock (GCLK_DAC) is required to clock the DAC Controller. This clock must be configured and
enabled in the generic clock controller before using the DAC Controller.
SAM D5x/E5x Family Data Sheet
DAC – Digital-to-Analog Converter
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1672