Datasheet

Table Of Contents

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Value Name Description

0x01 XOSC1 XOSC 1 oscillator output

0x02 GCLK_IN Generator input pad (GCLK_IO)

0x03 GCLK_GEN1 Generic clock generator 1 output

0x04 OSCULP32K OSCULP32K oscillator output

0x05 XOSC32K XOSC32K oscillator output

0x06 DFLL DFLL oscillator output

0x07 DPLL0 DPLL0 output

0x08 DPLL1 DPLL1 output

0x09-0x1F Reserved Reserved for future use

A Power Reset will reset all GENCTRLn registers. the Reset values of the GENCTRLn registers are

shown in table below.

Table 14-5. GENCTRLn Reset Value after a Power Reset

GCLK Generator Reset Value after a Power Reset

0 0x00000106

others 0x00000000

A User Reset will reset the associated GENCTRL register unless the Generator is the source of a locked

Peripheral Channel (PCHCTRLm.WRTLOCK=1). The reset values of the GENCTRL register are as

shown in the table below.

Table 14-6. GENCTRLn Reset Value after a User Reset

GCLK Generator Reset Value after a User Reset

0 0x00000106

others No change if the generator is used by a Peripheral Channel m with

PCHCTRLm.WRTLOCK=1

else 0x00000000