Datasheet

Table 46-1. I/O Lines
Instance Signal I/O Line Peripheral Function
AC0 AIN0 PAxx A
AC0 AIN1 PAxx A
AC0 AIN2 PAxx A
AC0 AIN3 PAxx A
AC0 CMP0 PAxx A
AC0 CMP1 PAxx A
Related Links
32. PORT - I/O Pin Controller
46.5.2 Power Management
The AC will continue to operate in any Sleep mode where the selected source clock is running. The AC’s
interrupts can be used to wake up the device from Sleep modes. Events connected to the Event System
can trigger other operations in the system without exiting Sleep modes.
46.5.3 Clocks
The AC bus clock (CLK_AC_APB) can be enabled and disabled in the Main Clock module, MCLK (see
MCLK - Main Clock, and the default state of CLK_AC_APB can be found in Peripheral Clock Masking.
A generic clock (GCLK_AC) is required to clock the AC. This clock must be configured and enabled in the
generic clock controller before using the AC. Refer to the Generic Clock Controller chapter for details.
This generic clock is asynchronous to the bus clock (CLK_AC_APB). Due to this asynchronicity, writes to
certain registers will require synchronization between the clock domains. Refer to Synchronization for
further details.
Related Links
15.6.2.6 Peripheral Clock Masking
15. MCLK – Main Clock
46.5.4 DMA
Not applicable.
46.5.5 Interrupts
The interrupt request lines are connected to the interrupt controller. Using the AC interrupts requires the
interrupt controller to be configured first. Refer to Nested Vector Interrupt Controller for details.
Related Links
10.2 Nested Vector Interrupt Controller
46.5.6 Events
The events are connected to the Event System. Refer to EVSYS – Event System for details on how to
configure the Event System.
Related Links
31. EVSYS – Event System
SAM D5x/E5x Family Data Sheet
AC – Analog Comparators
© 2019 Microchip Technology Inc.
Datasheet
DS60001507E-page 1642